Test engineering is an important and constantly growing area of engineering practice especially in the field of integrated circuit design. The test engineer is ideally involved in the development cycle of a device from start to finish and provides invaluable insight on the performance of the device. As in other branches of engineering, i.e., design, more and more of the tools used by the test system engineer to test device performance are simulation or modeling systems which run on a computer. The data used in these simulations, however, is still collected using hardware and connections which, while providing the computer with direct access to real data, create additional problems by introducing interference into the output signal of the device under test. This interference in turn affects the accuracy of any test or calculations using the device output.
The interference introduced by the testing equipment comes in a variety of forms. One form of interference can be caused by the testing approach itself. This results from the fact that the device output signal may exhibit settling in the form of exponential decay. If the testing process calls for sampling such a signal too early, i.e., prior to settling to its "final" state, the tester may mistakenly assume the signal is different from that at the "final" state. Thus, the test measurement is said to have occurred at a time when the signal is undersettled. With an undersettled signal, repeating the same measurement on the undersettled output signal of the device under test produces varying results.
The effect of the exponential settling curve is eliminated in prior art approaches by waiting for the signal to settle to a steady state prior to measuring its state. The extra wait time, however, can add up to hundreds of milliseconds of additional test time per device. Testing equipment, costing several million dollars and having a fixed useful life, thus processes fewer devices during that useful life, resulting in a higher production cost per device. Alternatively, the exponential decay can be eliminated by changing the hardware configuration to eliminate the source of the decay. For example, in the case of an AC coupled signal, a blocking capacitor can sometimes be shorted out to eliminate its effect. However, this approach is often not a viable solution since the blocking capacitor modifies the nature of the circuit of the device under test and thus introduces further inaccuracies.
Another approach to eliminating the exponential decay is to "squeeze" the endpoints of the captured signal towards zero, in effect forcing coherence (i.e., forcing the endpoints of the signal to wrap around smoothly from one period to the next). This is accomplished by a process called windowing. Windowing is a well known technique in digital signal processing and in test engineering. Windowing is a digital signal processing technique of partitioning a long sequence into smaller subsections by multiplying the long sequence by a shorter sequence of non-zero values (usually by a shorter sequence of all ones). For example, the sequence 8, 3, 6, 4, 1, 0, 2, 3 windowed using the sequence 0, 0, 0, 1, 1, 1, 0, 0 produces the sequence 0, 0, 0, 4, 1, 0, 0, 0.
Windowing, however, has a well known side effect in that it too, like the blocking capacitor, introduces substantial error in the measured signal level. The error arises because windowing allows some of the energy at each frequency in the measured signal to spread into adjacent spectral bins, lowering the apparent measured signal levels. Windowing also fails to eliminate the energy from the exponential decay, so the measured signal levels remain corrupted.
Another source of noise or interference in signals is 60 Hertz power hum. 60 Hertz power hum is very difficult to extract. One prior art solution to this problem is to try to avoid the 60 Hertz power hum interference altogether by using good hardware design. In many situations, however, this is not possible and the effect of 60 Hertz power hum is simply tolerated.